 Take our Quick Survey and enter a drawing for a chance to win a $100 VISA Gift Card.Software Search Result for Finite state machine :
Automated code generation tool.AutoGen is a tool designed for generating program files that contain repetitive text with varied substitutions. Its goal is to simplify the maintenance of programs that contain large amounts of repetitious text. This is especially valuable if there are several blocks of such text that must be kept synchronized, for example parsing command line options. Licence : GPLKeywords : code generator, command line, finite state machine, option, parser, macro, preprocessor
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Verilog code coverage analysis utility. | Covered is a Verilog code-coverage utility used for Design Verification which is capable of performing line, toggle, memory, combinational logic, finite state machine (FSM) and assertion coverage analysis. Verilog source files are parsed along with VCD/LXT dumpfiles (or can be run as VPI module in the simulator) to create Coverage Description Database (CDD) files which can be merged with other ...Licence : GPLKeywords : verilog, coverage, code, analysis |
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