 Take our Quick Survey and enter a drawing for a chance to win a $100 VISA Gift Card.Software Search Result for Verilog :
Verilog code coverage analysis utility. | Covered is a Verilog code-coverage utility used for Design Verification which is capable of performing line, toggle, memory, combinational logic, finite state machine (FSM) and assertion coverage analysis. Verilog source files are parsed along with VCD/LXT dumpfiles (or can be run as VPI module in the simulator) to create Coverage Description Database (CDD) files which can be merged with other ...Licence : GPLKeywords : verilog, coverage, code, analysis |
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Fully featured wave viewer. | GTKWave is a fully featured GTK+ v1.2 based wave viewer for Unix and Win32 which reads Ver Structural Verilog Compiler generated AET files as well as standard Verilog VCD/EVCD files and allows their viewing.
Licence : Freely distributable |
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Structural Verilog compiler for UNIX operating systems. | Structural Verilog compiler for UN*X operating systems. Some synthesizable behavioral constructs are now supported. An event simulator (vsim) is included for testing of logic designs. A cycle simulation compiler (cyco/csim) is included which can compile netlists into fast levelized C code. Cyco can also generate ABEL netlists that may be used for FPGA generation. GTKWave, a fully-featured wave ...Licence : GPL |
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